Directional tile code[1]
Description
Member of a family of tile codes whose stabilizer supports form an ordered connected string on a planar square lattice, chosen so that the same string is a nearest-neighbor walk measuring the stabilizer generator it defines. One word in the four lattice directions fixes the \(X\)-type tile, its dual-lattice \(Z\)-type partner, the measurement schedule, and the iSWAP-based circuit that executes it. These codes combine open planar boundaries, finite-size parameters improving on those of the rotated surface code, and syndrome extraction using only nearest-neighbor gates on a square grid.
A directional word \(\mathfrak{D}=\vec{d}_1\vec{d}_2\cdots\vec{d}_w\) is an ordered string of steps in the four lattice directions. Its trace on the square lattice is a bounded connected string whose edges form the support of an \(X\)-type tile. The partner \(Z\)-type tile carries the same string on the dual lattice, which makes the pair satisfy the commutation condition of the tile-code construction. One further condition is imposed so that the syndrome-extraction circuit is deterministic. Every displacement vector between two edges of the ordered string that has odd vertical displacement must occur an even number of times [1].
A code is obtained by tessellating the directional tile pair over an \(M\times N\) grid of anchor vertices, with both tile types placed at each bulk anchor. Along the boundary, \(X\)- and \(Z\)-type tiles are placed separately. Edges meeting tiles of at most one type are then pruned, along with any tile left with empty support. The surviving edges are the data qubits and the surviving anchors are the check qubits. Embedding the result in a square-grid layout can leave gaps between a check qubit and the data qubits it must reach, and these are filled with routing qubits that keep every step of the walk nearest-neighbor.
One syndrome-extraction round applies one CXSWAP layer per letter of the word, giving depth \(w\), or \(w+2\) including check-qubit preparation and measurement, independently of the code size. The CXSWAP gate is local-Clifford equivalent to the iSWAP gate, and its CNOT part accumulates the stabilizer eigenvalue while its SWAP part advances the walk. A routing step is the same gate applied to a routing qubit prepared in \(|0\rangle\), on which CXSWAP acts as a SWAP. Consecutive rounds alternate between the word and its inverse, which restores the layout without long-range operations.
Representative instances are the \([[60,4,5]]\) and \([[180,4,9]]\) codes from the weight-7 word \(N^2ESEN^2\), the \([[217,10,7]]\) and \([[351,10,9]]\) codes from the weight-9 word \(N^2E^2SE^2N^2\), the \([[182,14,10]]\) and \([[323,14,15]]\) codes from the weight-11 word \(N^2E^2SESE^2N^2\), and the \([[248,20,11]]\) code from the weight-13 word \(N^2E^2SE^3SE^2N^2\) [1]. The \([[323,14,15]]\) code has code-parameter efficiency \(kd^2/n=9.75\), nearly an order of magnitude above that of the rotated surface code. Choosing an unbalanced aspect ratio of the anchor grid yields instances with strongly unbalanced \(X\)- and \(Z\)-type distances, such as a \([[611,20,d_X,d_Z]]\) code with \(d_X\leq 84\) and \(d_Z=7\).
Protection
Logical operators have a boundary-to-boundary structure like those of the surface code, so the \(X\)- and \(Z\)-type distances are controlled by the two bulk dimensions \(M\) and \(N\) of the anchor grid, respectively [1].Rate
The code-parameter efficiency \(kd^2/n\) reaches 9.76 for the \([[248,20,11]]\) code. Since the implementation needs routing qubits, performance is also measured by the circuit-efficiency ratio \(\eta_{\text{circ}}=k\,n_{\text{RSC}(d)}/n_{\text{circ}}\), which compares the full layout against \(k\) rotated surface-code patches using \(n_{\text{RSC}(d)}=2d^2-1\) and counts all data, check, and routing qubits in \(n_{\text{circ}}\). This ratio reaches 7.89 for the \([[323,14,15]]\) code [1].Transversal and Permutation-Based Gates
Logical Pauli operators are given by the canonical symplectic basis of tile codes, whose representatives are supported near the lattice boundaries and are generated by a finite cellular-automaton rule [1,2].Decoding
Routing qubits can be measured during the walk. Nontrivial outcomes flag faults along the routing path and are supplied to the decoder, which improves decoding at relatively high physical error rates [1].Fault Tolerance
Syndrome extraction is a nearest-neighbor walk of depth \(w\) built from CXSWAP gates, with \(w+2\) counting check-qubit preparation and measurement. The depth is independent of the code size and is optimal for stabilizer generators of weight \(w\) [1].Under a uniform circuit-level depolarizing noise model at physical error rate \(10^{-3}\), the best layouts reduce the per-logical per-round logical error rate by up to three orders of magnitude relative to rotated surface-code memories encoding the same number of logical qubits, at a comparable footprint of about 30 circuit qubits per logical qubit [1].Faults on routing qubits propagate in a bounded way, since each data or check qubit participates in at most \(w\) two-qubit interactions per round [1].Cousins
- Directional code— Directional tile codes are the open-boundary (planar) analogues of directional codes, in the same way that tile codes are the open-boundary analogues of BB codes [1]. A directional tile code can equivalently be viewed as an open-boundary patch cut from a directional code, or as a planar tessellation by connected-string tiles [1]. Preserving the ordered walk on the open patch is what keeps every bulk and boundary stabilizer generator measurable by the same nearest-neighbor dynamics.
- 2D color code— The boundary-dominated routing overhead of directional tile codes is analogous to the routing overhead established for color-code circuits built from CXSWAP gates [3].
Primary Hierarchy
References
- [1]
- B. Gu, T. Noszko, V. Steffan, J. N. Eberhardt, J. Roffe, J. Eisert, and S. Koutsioumpas, “Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid”, (2026) arXiv:2606.19482
- [2]
- N. P. Breuckmann, S. H. Choe, J. N. Eberhardt, F. R. F. Pereira, and V. Steffan, “Logical Operators and Derived Automorphisms of Tile Codes”, (2025) arXiv:2511.14589
- [3]
- S. Yoshida, C. Gidney, M. McEwen, and A. Zalcman, “Low Depth Color Code Circuits with CXSWAP gate”, (2025) arXiv:2510.00370
Page edit log
- Victor V. Albert (2026-08-26) — most recent
Cite as:
“Directional tile code”, The Error Correction Zoo (V. V. Albert & P. Faist, eds.), 2026. https://errorcorrectionzoo.org/c/directional_tile, arXiv:2606.11484